Rendergraph compilation method and use thereof for low-latency execution
US9223551B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 22, 2014 |
| Grant date | Dec 29, 2015 |
| Priority date | — |
| Expiry date | Jul 22, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2210/61
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A graph is compiled that defines a data flow from input(s) to output(s) for images. The data flow includes one or more filters to be applied to the images. Compiling the graph includes forming an assemblage of kernel invocations for the data flow and forming a mapping between kernel invocations in code for the one or more filters and the assemblage of kernel invocations. For multiple ones of a number of frames of images, code in the one or more filters is executed, data is passed into the assemblage to indicate which execution path in the assemblage should be chosen from among a plurality of possible execution paths for one of the filters, wherein the data is determined using at least the mapping and the executing code, and kernel invocations in the indicated execution path are executed. Methods, apparatus, and computer program products are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.