Introducing timing synchronization indicating stall reason in next synchronization window
US9223676B2 · kind B2 · utility
0Cited by
6References
1Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2014 |
| Grant date | Dec 29, 2015 |
| Priority date | — |
| Expiry date | Dec 3, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3636
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic tracing process includes packing both stall (215) and reason (219) data into a single high priority timing information stream. An integrated circuit includes an electronic processor (110), and a tracing circuit (120) operable to pack both stall and events data into a single timing information stream. Other circuits, processes and systems are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.