Servicing a globally broadcast interrupt signal in a multi-threaded computer
US9223728B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2013 |
| Grant date | Dec 29, 2015 |
| Priority date | — |
| Expiry date | Feb 21, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, apparatuses, and computer program products for servicing a globally broadcast interrupt signal in a multi-threaded computer comprising a plurality of processor threads. Embodiments include an interrupt controller indicating in a plurality of local interrupt status locations that a globally broadcast interrupt signal has been received by the interrupt controller. Embodiments also include a thread determining that a local interrupt status location corresponding to the thread indicates that the globally broadcast interrupt signal has been received by the interrupt controller. Embodiments also include the thread processing one or more entries in a global interrupt status bit queue based on whether global interrupt status bits associated with the globally broadcast interrupt signal are locked. Each entry in the global interrupt status bit queue corresponds to a queued global interrupt.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.