Secure processing sub-system that is hardware isolated from a peripheral processing sub-system
US9224013B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2012 |
| Grant date | Dec 29, 2015 |
| Priority date | — |
| Expiry date | Mar 17, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are provided that allow a secure processing system (SPS) to be implemented as a hard macro, thereby isolating the SPS from a peripheral processing system (PPS). The SPS and the PPS, combination, may form a secure element that can be used in conjunction with a host device and a connectivity device to allow the host device to engage in secure transactions, such as mobile payment over a near field communications (NFC) connection. As a result of the SPS being implemented as a hard macro isolated from the PPS, the SPS may be certified once, and re-used in other host devices without necessitating re-certification.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.