LDMOS transistors for CMOS technologies and an associated production method
US9224856B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2011 |
| Grant date | Dec 29, 2015 |
| Priority date | — |
| Expiry date | Aug 18, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/116
Abstract
In a semiconductor component or device, a lateral power effect transistor is produced as an LDMOS transistor in such a way that, in combination with a trench isolation region (12) and the heavily doped feed guiding region (28, 28A), an improved potential profile is achieved in the drain drift region (8) of the transistor. For this purpose, in advantageous embodiments, it is possible to use standard implantation processes of CMOS technology, without additional method steps being required.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.