Methods and apparatus for minimizing wander generation in constant bit rate asynchronously mapped digital transport systems
US9225446B2 · kind B2 · utility
0Cited by
2References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2010 |
| Grant date | Dec 29, 2015 |
| Priority date | — |
| Expiry date | May 4, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/07
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A client receive circuit receives client data from a network, decodes the client data and stores the client data within the memory. A frame transmit circuit is provided that includes a justification control logic and a framer and a justification control logic is provided that 1) determines each of a plurality of fill levels and 2) determines an average of the plurality of fill levels. The framer has circuitry to generate a wrapper including a justification opportunity having data based upon a difference between the average and a predetermined threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.