Pattern synthesis apparatus and semiconductor test system having the same
US9229057B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2012 |
| Grant date | Jan 5, 2016 |
| Priority date | — |
| Expiry date | Sep 7, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318371
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A semiconductor test system includes a user device configured to operate a reference device in accordance with an interface signal based on a timing signal having a variable operating frequency, a pattern synthesis apparatus configured to measure an interval between adjacent edges of the timing signal transmitted from the user device, and extract a logic value of the interface signal in accordance with the timing signal so as to generate test pattern data, and a test device configured to receive the test pattern data, reconstruct the timing signal based on the measured interval, generate a test driving signal such that the logic value is extracted from a device under test (DUT) based on the reconstructed timing signal, and apply the test driving signal to the DUT so as to determine an operating state of the DUT.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.