Executing subroutines in a multi-threaded processing system
US9229721B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 10, 2012 |
| Grant date | Jan 5, 2016 |
| Priority date | — |
| Expiry date | May 28, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/38885
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This disclosure is directed to techniques for executing subroutines in a single instruction, multiple data (SIMD) processing system that is subject to divergent thread conditions. In particular, a resume counter-based approach for managing divergent thread state is described that utilizes program module-specific minimum resume counters (MINRCs) for the efficient processing of control flow instructions. In some examples, the techniques of this disclosure may include using a main program MINRC to control the execution of a main program module and subroutine-specific MINRCs to control the execution of subroutine program modules. Techniques are also described for managing the main program MINRC and subroutine-specific MINRCs when subroutine call and return instructions are executed. Techniques are also described for updating a subroutine-specific MINRC to ensure that the updated MINRC value for the subroutine-specific MINRC is within the program space allocated for the subroutine.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.