HVMOS transistor structure having offset distance and method for fabricating the same
US9231097B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 6, 2013 |
| Grant date | Jan 5, 2016 |
| Priority date | — |
| Expiry date | May 20, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/663
Abstract
An HVMOS transistor structure includes: a first ion well of a first conductivity type and a second ion well of a second conductivity type different from the first conductivity type formed over a substrate, wherein the first ion well and the second ion well have a junction at their interface; a gate overlying the first ion well and the second ion well; a drain region of the first conductivity type, in the first ion well, spaced apart from a first sidewall of the gate by an offset distance; and a source region of the first conductivity type in the second ion well. In addition, a method for fabricating the HVMOS transistor structure described above is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.