Semiconductor device with group-III nitride compound semiconductor layer on substrate for transistor
US9231105B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 2014 |
| Grant date | Jan 5, 2016 |
| Priority date | — |
| Expiry date | Aug 21, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/112
Abstract
To realize a transistor of normally-off type having a high mobility and a high breakdown voltage. A compound semiconductor layer is formed over a substrate, has both a concentration of p-type impurities and a concentration of n-type impurities less than 1×1016/cm3, and includes a group III nitride compound. A well is a p-type impurity layer and formed in the compound semiconductor layer. A source region is formed within the well and is an n-type impurity layer. A low-concentration n-type region is formed in the compound semiconductor layer and is linked to the well. A drain region is formed in the compound semiconductor layer and is located on a side opposite to the well via the low-concentration n-type region. The drain region is an n-type impurity layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.