Delay controlling circuit for driving circuit, driving circuit having delay controlling circuit, and method of operating driving circuit
US9231573B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 30, 2014 |
| Grant date | Jan 5, 2016 |
| Priority date | — |
| Expiry date | Jul 2, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00195
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A driving circuit includes first and second switches coupled in series, a delay generating circuit and a delay controlling circuit. The delay generating circuit and the delay controlling circuit are coupled to first and second control terminals of the first and second switches. The delay generating circuit is configured to alternately turn ON the first switch and the second switch in accordance with an input signal and with a delay between successive ON times of the first switch and the second switch. The delay controlling circuit is configured to store a setting of the delay, and control the delay generating circuit to generate the delay in accordance with the stored setting, a first voltage on the first control terminal and a second voltage on the second control terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.