Patent · US Active

Techniques relating to phase-locked loop circuits

US9231601B1 · kind B1 · utility

0Cited by
3References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 9, 2015
Grant dateJan 5, 2016
Priority date
Expiry dateJan 9, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L7/099
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A phase-locked loop circuit includes a regulator circuit, first and second inductor-capacitor tank circuits, and first and second load capacitors. The regulator circuit generates a supply voltage. The first load capacitor is coupled to the regulator circuit and to the first inductor-capacitor tank circuit. The first load capacitor provides current for the supply voltage to the first inductor-capacitor tank circuit. The second load capacitor is coupled to the regulator circuit and to the second inductor-capacitor tank circuit. The second load capacitor provides current for the supply voltage to the second inductor-capacitor tank circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.