A-priori-probability-phase-estimation for digital phase-locked loops
US9231602B1 · kind B1 · utility
5Cited by
1References
25Claims
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Key dates
| Filing date | Sep 18, 2014 |
| Grant date | Jan 5, 2016 |
| Priority date | — |
| Expiry date | Sep 18, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/50
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A digital phase locked loop operates with a time-to-digital converter and an a-priori-probability-phase-estimation component or estimator component that estimates the un-quantized phase associated with a quantization output of the time-to-digital converter. The time-to-digital converter generates a quantized value as the quantization output from a local oscillator signal of a local oscillator and a reference signal of a reference clock. The estimation component estimates a phase value from the quantized values as a function of a-priori data related to the time-to-digital converter and boundaries of the quantized value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.