Dither-less error feedback fractional-N frequency synthesizer systems and methods
US9231606B2 · kind B2 · utility
7Cited by
8References
22Claims
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Key dates
| Filing date | Jul 9, 2014 |
| Grant date | Jan 5, 2016 |
| Priority date | — |
| Expiry date | Jul 9, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/361
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A fractional-N divider of a frequency synthesizer is driven by a dither-less error feedback modulator to alleviate fractional spurious tones introduced by the cyclic train of division ratios from delta-sigma modulators. A first feedback loop generates the feedback signal. A second feedback loop disrupts fractional spurious tones and a third feedback loop provides approximately zero static error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.