Processing circuits of telecommunications devices and related methods
US9231893B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2013 |
| Grant date | Jan 5, 2016 |
| Priority date | — |
| Expiry date | Aug 21, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/90
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An embodiment of the invention provides a processing circuit of a telecommunications device. The processing circuit includes a pre-buffer, a de-shuffler, and a processing module. The pre-buffer is configured to receive and buffer a plurality of sets of data of a transport block in a shuffled order. The sets of data correspond to a plurality of code blocks, respectively. The de-shuffler is coupled to the pre-buffer and is configured to retrieve the sets of data from the pre-buffer in a de-shuffled order. The de-shuffled order is different from the shuffled order. The processing module is coupled to the de-shuffler and is configured to receive the sets of data from the de-shuffler in the de-shuffled order to recover the code blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.