Mains synchronized PWM dimming
US9232596B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2015 |
| Grant date | Jan 5, 2016 |
| Priority date | — |
| Expiry date | Mar 11, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B20/30
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Driver circuits which reduce or remove flicker of solid state lighting SSL devices, notably at relatively low dimming levels are presented. The driver circuit comprises a power converter to transfer energy from an input of the driver circuit to the SSL device. The energy at the input is derived from an AC mains voltage at a mains frequency. A controller determines a dim level for the SSL device. and operates the power converter continuously in a first operation mode for supplying energy to the SSL device at a first energy level, if the dim level is above a pre-determined dim level threshold. The controller operates the power converter in the first operation mode at a time duration of PWM pulses, and operates the power converter in a second operation mode at a time duration in-between the PWM pulses, if the dim level is below the pre-determined dim level threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.