MEMS display pixel control circuits and methods
US9235047B2 · kind B2 · utility
4Cited by
7References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 30, 2012 |
| Grant date | Jan 12, 2016 |
| Priority date | — |
| Expiry date | Aug 12, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0262
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
This disclosure provides novel latching circuits, and pixel circuits and display devices that include such latching circuits. The latches herein include a switch positioned on an inverter coupling interconnect which couples two cross-coupled inverters of the latch. The switch is configured to control a passage of a current between the first and second inverters. By switching the switch OFF at a time a data voltage is transferred to the inverters, any leak current between the inverters can be interrupted. As a result, a malfunctioning of the data latch is prevented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.