Dynamic balancing of power across a plurality of processor domains according to power policy control bias
US9235252B2 · kind B2 · utility
11Cited by
23References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2012 |
| Grant date | Jan 12, 2016 |
| Priority date | — |
| Expiry date | Jan 13, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an embodiment, a processor includes multiple domains including a core domain having at least one core to execute instructions and a graphics domain including at least one graphics engine to perform graphics operations and a power controller to control power consumption of the processor. The power controller may include a logic to receive an indication of a priority domain of the domains and to dynamically allocate power to the domains based on a power limit, one or more maximum domain frequency requests, and the priority domain indication. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.