SIMD integer multiply-accumulate instruction for multi-precision arithmetic
US9235414B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2011 |
| Grant date | Jan 12, 2016 |
| Priority date | — |
| Expiry date | Jan 18, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3893
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multiply-and-accumulate (MAC) instruction allows efficient execution of unsigned integer multiplications. The MAC instruction indicates a first vector register as a first operand, a second vector register as a second operand, and a third vector register as a destination. The first vector register stores a first factor, and the second vector register stores a partial sum. The MAC instruction is executed to multiply the first factor with an implicit second factor to generate a product, and to add the partial sum to the product to generate a result. The first factor, the implicit second factor and the partial sum have a same data width and the product has twice the data width. The most significant half of the result is stored in the third vector register, and the least significant half of the result is stored in the second vector register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.