Integrated circuit design using dynamic voltage scaling
US9235678B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2014 |
| Grant date | Jan 12, 2016 |
| Priority date | — |
| Expiry date | Oct 1, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and an apparatus from such method for designing an integrated circuit (IC) that mitigates the effects of process, voltage, and temperature dependent characteristics on the fabrication of advanced IC's but provides high die yields, lower power usage, and faster circuits. Conventional design process takes into account power supply voltage Vdd as a variable that must be considered in a skewed corner analysis. The disclosure teaches that the IC design process can be substantially simplified by essentially factoring out voltage based variations in corner lot analysis for IC designs that include dynamic voltage scaling circuitry, because each fabricated IC die of an IC design having dynamic voltage scaling can individually adjust the applied supply voltage Vdd within a range to offset local process-induced variations in the performance of that specific IC die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.