Ring-pattern bus connected information processing apparatus, information processing method, and storage medium
US9239813B2 · kind B2 · utility
1Cited by
3References
39Claims
0Family size
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Key dates
| Filing date | Mar 9, 2010 |
| Grant date | Jan 19, 2016 |
| Priority date | — |
| Expiry date | Mar 20, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an information apparatus including a plurality of processing circuits connected to a ring bus, when processing speeds (throughput) of processing circuits are different or an amount of data in the processing circuit is increased or decreased, deadlock can occur or the throughput can be decreased in the ring bus. In order to solve this problem, a stall state of other processing unit is detected from a packet acquired from the ring bus and a packet is restricted from being newly generated by the processing circuit nor transmitted therefrom when other processing unit is in the stall state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.