Gate-driver-on-array (GOA) circuit
US9240156B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 21, 2014 |
| Grant date | Jan 19, 2016 |
| Priority date | — |
| Expiry date | Apr 27, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0252
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a GOA (Gate-Driver-on-Array) circuit, which includes multiple GOA units connected in cascade. An nth stage GOA unit of the GOA circuit includes a first (n−1)th stage signal input terminal (21), a second (n−1)th stage signal input terminal (22), a (n+1)th stage signal input terminal (23), a first clock signal input terminal (24), a first low level input terminal (25), a second low level input terminal (26), a first output terminal (27), and a second output terminal (28). The nth stage GOA unit further includes: a pull-up control unit (42), a pull-up unit (44), a first pull-down holding unit (46), a second pull-down holding unit (47), and a pull-down unit (48). The GOA circuit of the present invention overcomes the problems of poor performance of the conventional the GOA circuit caused by introduction of two low level signals into the GOA circuit and short operation service life and can enhance the quality of displayed images.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.