Static memory apparatus and data reading method thereof
US9240228B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2014 |
| Grant date | Jan 19, 2016 |
| Priority date | — |
| Expiry date | Aug 12, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A static memory apparatus and a data reading method thereof are provided. The static memory apparatus includes a plurality of memory cells, a plurality of dummy memory cells, a sense amplifier, and a discharge current adjuster. The dummy memory cells respectively include a plurality discharge ends for discharging charges on a dummy bit line. The sense amplifier is enabled for a sensing and amplifying operation according to a signal on the dummy bit line, and the sense amplifier generates readout data accordingly. The discharge current adjuster adjusts at least one discharge current on at least one controlled discharge end according to an operating voltage of the memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.