High linearity, high efficiency, low noise, gain block using cascode network
US9240756B1 · kind B1 · utility
0Cited by
16References
8Claims
0Family size
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Key dates
| Filing date | Mar 12, 2013 |
| Grant date | Jan 19, 2016 |
| Priority date | — |
| Expiry date | Mar 12, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A two-stage RF amplifier comprising first and second transistors arranged in cascode. The first transistor cooperatively connected to an input RF signal source through a parallel RC network. The gate of the second transistor terminated with a lossy connection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.