Local voltage control for isolated transistor arrays
US9244478B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2014 |
| Grant date | Jan 26, 2016 |
| Priority date | — |
| Expiry date | Aug 8, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/16
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
Self-biasing transistor switching circuitry includes a main transistor, a biasing transistor, a first capacitor, and a second capacitor. The body of the main transistor is isolated from the gate, the drain, and the source of the main transistor by an insulating layer. The first capacitor is coupled between the source and the gate of the main transistor. The second capacitor is coupled between the source and the body of the main transistor. The body and the drain of the main transistor are coupled together. The gate and the drain of the biasing transistor are coupled to the gate of the main transistor. The drain of the biasing transistor is coupled to the drain of the main transistor. The self-biasing transistor switching circuitry is adapted to receive an oscillating signal at the drain of the main transistor, and use the oscillating signal to appropriately bias the main transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.