Using a double-cut for mechanical protection of a wafer-level chip scale package (WLCSP)

US9245804B2 · kind B2 · utility

Assignee

• NXP B.V. · NL

Inventors

• Christian Zenz · Graz, AT
• Hartmut Buenning · Norderstedt, DE
• Leonardus Antonius Elisabeth van Gemert · Nijmegen, NL
• Tonny Kamphuis · Lent, NL
• Sascha Moeller · Hamburg, DE

Key dates

• Filing date: Aug 14, 2013
• Grant date: Jan 26, 2016
• Expiry date: Aug 14, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/12042
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Consistent with an example embodiment, there is a semiconductor device, with an active device having a front-side surface and a backside surface; the semiconductor device of an overall thickness, comprises an active device with circuitry defined on the front-side surface, the front-side surface having an area. The back-side of the active device has recesses f a partial depth of the active device thickness and a width of about the partial depth, the recesses surrounding the active device at vertical edges. There is a protective layer of a thickness on to the backside surface of the active device, the protective material having an area greater than the first area and having a stand-off distance. The vertical edges have the protective layer filling the recesses flush with the vertical edges. A stand-off distance of the protective material is a function of the semiconductor device thickness and the tangent of an angle (θ) of tooling impact upon a vertical face the semiconductor device.