ESD protection for 2.5D/3D integrated circuit systems
US9245852B2 · kind B2 · utility
4Cited by
1References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2011 |
| Grant date | Jan 26, 2016 |
| Priority date | — |
| Expiry date | Oct 1, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/157
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit structure includes first and second integrated circuit devices disposed on a interposer. Each integrated circuit device has electrostatic discharge (ESD) protection circuitry therein connected to an internal ESD bus. The first and second integrated circuit devices communicate with one another through the interposer. The interposer includes an ESD bus electrically connected to the ESD busses of the first and second integrated circuit devices for providing cross-device ESD protection for the integrated circuit devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.