Semiconductor devices and methods of fabricating the same
US9245899B2 · kind B2 · utility
0Cited by
3References
11Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 16, 2015 |
| Grant date | Jan 26, 2016 |
| Priority date | — |
| Expiry date | Jun 16, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a lower insulating pattern on a semiconductor substrate, a lower gate pattern on the lower insulating pattern and formed of a doped polysilicon layer, a residual insulating pattern with an opening exposing a portion of a top surface of the lower gate pattern, an upper gate pattern on the residual insulating pattern, the upper gate pattern filling the opening, and a diffusion barrier pattern in contact with the portion of the top surface of the lower gate pattern and extending between the residual insulating pattern and the upper gate pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.