Three stage amplifier
US9246455B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 2, 2013 |
| Grant date | Jan 26, 2016 |
| Priority date | — |
| Expiry date | May 3, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45652
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A cascaded amplifier including a pre-amplifier stage having a pair of first transistors, each of the first transistors having a first gate terminal coupled to a first input voltage, a trans-conductive (gm) amplifier stage having a pair of second transistors, each of the second transistors having a second gate terminal coupled to a drain terminal of one of the first transistors, and an integrator amplifier stage having a pair of third transistors, each of the third transistors having a third gate terminal coupled to a drain node of one of the second transistors, each of the third transistors having their drain terminals coupled to an output voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.