Array substrate and liquid crystal display
US9250477B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 15, 2012 |
| Grant date | Feb 2, 2016 |
| Priority date | — |
| Expiry date | Dec 18, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/134381
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An embodiment of the present disclosure provides an array substrate, and the array substrate including: at least a data line and at least a gate line; and a plurality of pixel units defined by the data line and the gate line. Each of the plurality of pixel units includes a thin film transistor, a first electrode and a second electrode, and the first electrode and the second electrode overlap each other and are insulated from each other and the second electrode is positioned above the first electrode. An alignment film is formed on a surface of the array substrate, a direction of the second electrode and one side of the array substrate form a predetermined angle and a rubbing direction of the alignment film is parallel to the one side of the array substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.