Control flow error localization
US9251045B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2014 |
| Grant date | Feb 2, 2016 |
| Priority date | — |
| Expiry date | Mar 23, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3692
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Localizing errors by: (i) running a testcase on a hardware processor and saving results; (ii) running the testcase on a software model of the processor and saving results; (iii) recording control flow information during the software run; (iv) determining a set of miscompare data storage locations by comparing the results from the hardware run with those from the software run; (v) based on the set of miscompare data storage locations and/or the control flow information, generating and running a modified version of the testcase that takes a different execution path when run on the software model than did the original testcase when run on the software model; and (vii) comparing the results from the hardware run and the results obtained from the modified software run to provide an indication of similarity between execution paths taken in these respective runs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.