Controlling the execution speed of a processor in an audio processing system
US9251254B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2013 |
| Grant date | Feb 2, 2016 |
| Priority date | — |
| Expiry date | Mar 20, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/8106
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
This disclosure is directed to techniques for controlling the execution speed of a processor that executes audio processing algorithms. In some examples, the execution speed of the processor may be controlled based on one or more delay parameters that are obtained from querying one or more tasks that execute the audio processing algorithms. The delay parameters that are returned by the tasks in response to the queries may, in some examples, be dependent upon one or more algorithm-specific parameters that are used to configure the audio processing algorithms. The techniques of this disclosure may be used to reduce the amount of power consumed by a processor that is configured to execute one or more audio processing algorithms in an audio communication device, which may be particularly useful in audio communication devices where power resources are limited, such as, e.g., a mobile phone.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.