Ground-referenced single-ended memory interconnect
US9251870B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 2013 |
| Grant date | Feb 2, 2016 |
| Priority date | — |
| Expiry date | Jul 16, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system is provided for transmitting signals. The system comprises a first processing unit, a cache memory, and a package. The first processing unit comprises a first ground-referenced single-ended signaling (GRS) interface circuit and the second processing unit comprises a second GRS interface circuit. The cache memory comprises a third and a fourth GRS interface circuit. The package comprises one or more electrical traces that couple the first GRS interface to the third GRS interface and couple the second GRS interface to the fourth GRS interface, where the first GRS interface circuit, the second GRS interface, the third GRS interface, and the fourth GRS interface circuit are each configured to transmit a pulse along one trace of the one or more electrical traces by discharging a capacitor between the one trace and a ground network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.