Manufacturing method for semiconductor device with discrete field oxide structure
US9252240B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2013 |
| Grant date | Feb 2, 2016 |
| Priority date | — |
| Expiry date | Dec 31, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26513
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A manufacturing method for a semiconductor device with a discrete field oxide structure is provided, the method includes: growing a first PAD oxide layer on the surface of a wafer; forming a first silicon nitride layer (302) on the first PAD oxide layer through deposition; defining a field region by photolithography and etching same to remove the first silicon nitride layer (302) located on the field region; performing an ion implantation process to the field region; performing field region oxidation to grow a field oxide layer (304); peeling off the first silicon nitride layer (302); wet-dipping the wafer to remove the first PAD oxide layer and a part of field oxide layer (304); growing a second PAD oxide layer on the surface of the wafer, and forming a second silicon nitride layer (312) on the second PAD oxide layer through deposition; defining a drift region by photolithography and etching same to remove the second silicon nitride layer (312) on the drift region; performing an ion implantation process to the drift region; and performing drift region oxidation to grow a drift region oxide layer (314). The above-mentioned method peels off the silicon nitride layer (302) after the …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.