Self-aligned thin film transistor and fabrication method thereof
US9252241B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2013 |
| Grant date | Feb 2, 2016 |
| Priority date | — |
| Expiry date | Oct 4, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D99/00
Abstract
Disclosed are a self-aligned thin film transistor capable of simultaneously improving an operation speed and stability and minimizing a size thereof by forming source and drain electrodes so as to be self-aligned, and a fabrication method thereof. The method of fabricating a thin film transistor according to an exemplary embodiment of the present disclosure includes: forming an active layer, a gate insulator, and a gate layer on a substrate; forming a photoresist layer pattern for defining a shape of a gate electrode on the gate layer; etching the gate layer, the gate insulator, and the active layer by using the photoresist layer pattern; depositing a source and drain layer on the etched substrate by a deposition method having directionality; and forming a gate electrode and self-aligned source electrode and drain electrode by removing the photoresist layer pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.