Iterative decoding of LDPC codes with iteration scheduling
US9252813B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 16, 2010 |
| Grant date | Feb 2, 2016 |
| Priority date | — |
| Expiry date | Aug 11, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/2906
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method includes accepting modulated symbols, which carry bits of a code word of a Low Density Parity Check (LDPC) code, and computing respective soft input metrics for the bits. The code word is decoded using an iterative LDPC decoding process that includes selecting, based on a predefined criterion, a number of internal iterations to be performed by an LDPC decoder (84) in the process, performing the selected number of the internal iterations using the LDPC decoder so as to estimate decoded bits and soft output metrics indicative of the input bits based on the soft input metrics, performing an external iteration that updates one or more of the soft input metrics based on one or more of the soft output metrics produced by the LDPC decoder, and repeating at least one of the internal iterations using the updated soft input metrics.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.