Adaptive low-power link-state entry policy for active interconnect link power management
US9256268B2 · kind B2 · utility
6Cited by
1References
14Claims
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Key dates
| Filing date | Apr 24, 2012 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | Jan 10, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for implementing active interconnect link power management using an adaptive low-power link-state entry policy. The power state of an interconnect link or fabric is changed in response to applicable conditions determined by low-power link-state entry policy logic in view of runtime traffic on the interconnect link or fabric. The low-power link-state policy logic may be configured to include consideration of operating system input and Quality of Service (QoS) requirements for applications and devices employing the link or fabric, and device latency tolerance requirements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.