Adjustment of destage rate based on read and write response time requirements
US9256533B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2013 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | Jul 10, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/126
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A storage controller that includes a cache receives a command from a host, wherein a set of criteria corresponding to read and write response times for executing the command have to be satisfied. The storage controller determines ranks of a first type and ranks of a second type corresponding to a plurality of volumes coupled to the storage controller, wherein the command is to be executed with respect to the ranks of the first type. Destage rate corresponding to the ranks of the first type are adjusted to be less than a default destage rate corresponding to the ranks of the second type, wherein the set of criteria corresponding to the read and write response times for executing the command are satisfied.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.