Security controlled multi-processor system
US9256734B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2012 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | Aug 5, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/034
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure provide systems and methods for implementing a secure processing system having a first processor that is certified as a secure processor. The first processor only executes certified and/or secure code. An isolated second processor executes non-secure (e.g., non-certified) code within a sandbox. The boundaries of the sandbox are enforced (e.g., using a hardware boundary and/or encryption techniques) such that code executing within the sandbox cannot access secure elements of the secure processing system located outside the sandbox. The first processor manages the memory space and the applications that are permitted to run on the second processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.