Memory system performing multi-step erase operation based on stored metadata
US9257192B2 · kind B2 · utility
0Cited by
6References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2014 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | Apr 11, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/344
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system, including a flash memory including multiple memory blocks, and a controller configured to erase each of the memory blocks using multiple steps. The controller stores, for each of the memory blocks, metadata indicating which of the multiple steps have been completed, and erases each of the memory blocks based on the stored metadata.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.