High speed dynamic flip-flop circuit with split output driver
US9257972B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2014 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | Sep 29, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356121
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A flip-flop circuit is disclosed. The flip-flop circuit includes pull-up and pull-down circuits each coupled to a data input and configured to be activated responsive to a clock signal transition from a first phase to a second phase, depending on the input data. A write circuit is configured to write data into a latch of the flip-flop responsive to activation of one of the pull-up and pull-down circuits. An output driver circuit includes a dynamic portion and a static portion, with the dynamic portion being activated responsive to activation of one of the pull-up and pull-down circuits. Activation of the dynamic portion may occur concurrently with writing of the data into the latch. The output driver circuit also includes a static portion. After the clock transitions back to the first phase, the static portion may drive and hold the output while the dynamic portion is deactivated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.