Low consumption logic circuit with mechanical switches
US9257981B2 · kind B2 · utility
3Cited by
1References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 6, 2014 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | Aug 6, 2034 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81B2201/01
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Adiabatic logic circuit having a first and a second inputs, a first and a second outputs and at least one supply and synchronization input (Phi), with this circuit comprising:
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.