Isolating interchip communication circuit and method
US9261538B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2014 |
| Grant date | Feb 16, 2016 |
| Priority date | — |
| Expiry date | Jun 6, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/48463
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An electrical circuit and method includes a transmitter in a first power domain with a first supply voltage referenced to a first voltage reference. The transmitter has an oscillator generating a first carrier signal, and an analog modulator receiving an input sensor signal and the first carrier signal and generating a modulated carrier signal. A receiver is in a second power domain with a second supply voltage referenced to a second voltage reference. The second voltage reference is different from the first voltage reference. The receiver includes a demodulator that receives and demodulates the modulated carrier signal and generates an output sensor signal. At least one coupler includes a pair of galvanically isolated elements with one galvanically isolated element in each of the first and second power domains. The modulated carrier signal couples from the first power domain to the second power domain through the at least one coupler.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.