Scalable, common reference-clocking architecture using a separate, single clock source for blade and rack servers
US9261897B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 2012 |
| Grant date | Feb 16, 2016 |
| Priority date | — |
| Expiry date | Jan 22, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Scalable, common reference-clocking architecture and method for blade and rack servers. A common reference clock source is configured to provide synchronized clock input signals to a plurality of blades in a blade server or servers in a rack server. The reference clock signals are then used for clock operations related to serial interconnect links between blades and/or servers, such as QuickPath Interconnect (QPI) links or PCIe links. The serial interconnect links may be routed via electrical or optical cables between blades or servers. The common reference clock input and inter-blade or inter-server interconnect scheme is scalable, such that the plurality of blades or servers can be linked together in communication. Moreover, when QPI links are used, coherent memory transactions across blades or servers are provided, enabling fine grained parallelism to be used for parallel processing applications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.