CPU scheduler configured to support latency sensitive virtual machines
US9262198B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2014 |
| Grant date | Feb 16, 2016 |
| Priority date | — |
| Expiry date | Aug 25, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/5017
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A host computer has one or more physical central processing units (CPUs) that support the execution of a plurality of containers, where the containers each include one or more processes. Each process of a container is assigned to execute exclusively on a corresponding physical CPU when the corresponding container is determined to be latency sensitive. The assignment of a process to execute exclusively on a corresponding physical CPU includes the migration of tasks from the corresponding physical CPU to one or more other physical CPUs of the host system, and the directing of task and interrupt processing to the one or more other physical CPUs. Tasks of the process corresponding to the container are then executed on the corresponding physical CPU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.