Serial flash XIP with caching mechanism for fast program execution in embedded systems
US9262318B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2014 |
| Grant date | Feb 16, 2016 |
| Priority date | — |
| Expiry date | Mar 12, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system including a processor, a memory controller, and a flash memory module. The processor is configured to generate a request to retrieve information corresponding to an address. The memory controller module includes a cache memory configured to store information, and a cache control logic module configured to determine whether the cache memory stores the information corresponding to the address, if the cache memory stores the information corresponding to the address, retrieve the information from the cache memory and provide the information to the processor, and if the cache memory does not store the information corresponding to the address, generate a flash memory read request based on the address. The flash memory module is configured to, in response to receiving the flash memory read request, provide the information corresponding to the address to the memory controller module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.