Patent · US Active

Address translation/specification field for hardware accelerator

US9262625B2 · kind B2 · utility

0Cited by

2References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Frank Haverkamp · Wangen im Allgäu, DE
Christian Jacobi · West Park, US
Scot H. Rider · Pleasant Valley, US
Vikramjit Sethi · Austin, US
Randal C. Swanberg · Round Rock, US
Joerg-Stephan Vogt · Holzgerlingen, DE

Key dates

Filing date	Sep 30, 2014
Grant date	Feb 16, 2016
Priority date	—
Expiry date	Sep 30, 2034

Classification

Technology area (CPC G)Physics
CPC primaryG06F21/79
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Embodiments relate an address translation/specification (ATS) field. An aspect includes receiving a work queue entry from a work queue in a main memory by a hardware accelerator, the work queue entry corresponding to an operation of the hardware accelerator that is requested by user-space software, the work queue entry comprising a first ATS field that describes a structure of the work queue entry. Another aspect includes, based on determining that the first ATS field is consistent with the operation corresponding to the work queue entry and the structure of the work queue entry, executing the operation corresponding to the work queue entry by the hardware accelerator. Another aspect includes, based on determining that the first ATS field is not consistent with the operation corresponding to the work queue entry and the structure of the work queue entry, rejecting the work queue entry by the hardware accelerator.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.