Interlayer communications for 3D integrated circuit stack
US9263422B2 · kind B2 · utility
4Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2015 |
| Grant date | Feb 16, 2016 |
| Priority date | — |
| Expiry date | Jan 16, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06544
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Some embodiments provide capacitive AC coupling inter-layer communications for 3D stacked modules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.