Super-junction schottky PIN diode
US9263515B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2012 |
| Grant date | Feb 16, 2016 |
| Priority date | — |
| Expiry date | Aug 19, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/115
Abstract
A semiconductor chip has an n+-doped substrate, above which an n-doped epilayer having trenches is introduced, the trenches being filled with p-doped semiconductor material and in each case having a highly p-doped region at their top side, such that an alternating arrangement of n-doped regions having a first width and p-doped regions having a second width is present. A first metal layer functioning as an anode is provided on the front side of the chip and forms a Schottky contact with the n-doped epilayer and forms an ohmic contact with the highly p-doped regions. A second metal layer which represents an ohmic contact and functioning as a cathode is formed on the rear side of the semiconductor chip. A dielectric layer is provided between each n-doped region and an adjacent p-doped region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.