Power factor correction
US9263938B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2012 |
| Grant date | Feb 16, 2016 |
| Priority date | — |
| Expiry date | Apr 27, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A power factor correction circuit includes an inductor L1, a diode D1, a switch Q3 and a controller 24. An input voltage Vin is applied to the inductor L1 which is cyclically discharged through the diode D1 by the operation of the switch Q3. The method of operation includes: operating a controller 24 to obtain an indication of the voltage across the switch Q3, monitoring the indication of the voltage across the switch Q3 to determine when the inductor L1 reaches a discharged state in response to the switch being in an off state, and the switch Q3 being controlled by the controller 24 to vary the on period of the switch Q3, during which the inductor is charged, for adjusting an output voltage Vbus towards a target value Vbustarget. The controller 24 monitors at least one of the indication of the voltage across the switch Q3 and the ratio of the switch on period Ton to the switch off period Toff for detecting that the input voltage Vin has a low value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.